Instruction Parameters
Supported PLC Series
| PLC-AES | PLC-FB | PLC-ES |
|---|---|---|
| ✓ | ✓ | ✓ |
Supported Data Registers
| M | X | Y | K | L | F | T | C | S | Z | R | Q | D | @D | Constant | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| S | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | – | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
| D | ✓ | – | ✓ | ✓ | ✓ | – | ✓ | ✓ | – | ✓ | ✓ | ✓ | ✓ | ✓ | – |
Supported Flags
| Flag | Bit | Support |
|---|---|---|
| Error | F11.0 | ✓ |
| Zero | F11.1 | – |
| Carry | F11.2 | – |
Number of Steps
| Steps |
|---|
| 3 |
Operands
| Operand | Description |
|---|---|
| S | The first operand. Entries are WORD data registers or constants. This is the value to invert all bits. The signed value range is -32,768 ~ 32,767 (216). The unsigned value range is 0 ~ 65,535 (216-1). The Hexadecimal value range is H0000 ~ HFFFF. |
| D | The second operand. Entries are only WORD data registers. This is where the inverted bits of S are stored. |
Notice
Error Flag (F11.0) Notice
The error flag, F11.0, will be ON for one scan when the address of the data register assigned by @D exceeds the range of the data register, D. The range of the data register, D, is dependent on the CPU type. F11.0 turns ON when the value of the data for inverting S exceeds the value range of the data register D.
Ladder Diagram Examples
CML
The CML instruction inverts every bit in the WORD value, S, and saves the inversion in an assigned WORD data register, D.
When the contact, M0.0, is powered ON (1), the instruction inverts the bits in the WORD data register, D0, and saves the result in the data register, D2.
Memory Monitor
CMLP
The CMLP one-shot inverts every bit in the WORD value, S, and saves the inversion in an assigned WORD data register, D. Every time this instruction executes, it energizes the output only once.
When the contact, M0.1, is powered ON (1), the instruction inverts the bits in the WORD data register, D4, and saves the result in the data register, D6.
Memory Monitor
