Instruction Parameters
Supported PLC Series
| PLC-AES | PLC-FB | PLC-ES |
|---|---|---|
| ✓ | ✓ | ✓ |
Supported Data Registers
| M | X | Y | K | L | F | T | C | S | Z | R | Q | D | @D | Constant | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| S1 | ✓ | ✓ | ✓ | ✓ | ✓ | – | – | – | – | ✓ | – | ✓ | ✓ | ✓ | ✓ |
| S2 | ✓ | ✓ | ✓ | ✓ | ✓ | – | – | – | – | ✓ | – | ✓ | ✓ | ✓ | ✓ |
| D | ✓ | – | ✓ | ✓ | ✓ | – | – | – | – | ✓ | – | ✓ | ✓ | ✓ | – |
Supported Flags
| Flag | Bit | Support |
|---|---|---|
| Error | F11.0 | ✓ |
| Zero | F11.1 | – |
| Carry | F11.2 | – |
Number of Steps
| Steps |
|---|
| 4 |
Operands
| Operand | Description |
|---|---|
| S1 | The first operand. Entries are REAL data registers or constants. This is the dividend. The value range is 2-127 ~ 2128 (-1.7014118e+38 ~ 3.4028237e+38). |
| S2 | The second operand. Entries are REAL data registers or constants. This is the divisor. The value range is 2-127 ~ 2128 (-1.7014118e+38 ~ 3.4028237e+38). |
| D | The third operand. Entries are only REAL data registers. This is where the product is saved. |
Float Representation
| Mantissa | Exponent | Sign |
|---|---|---|
| Bit 0 ~ Bit 22 | Bit 23 ~ Bit 30 | Bit 31 |
Notice
Error Flag (F11.0) Notice
The error flag, F11.0, will be ON for one scan when the address of the data register assigned by @D exceeds the range of the data register, D. The range of the data register, D, is dependent on the CPU type. F11.0 turns ON when the value of the data for dividing exceeds the data register assigned to S1 or S2. F11.0 turns ON when the value of the divisor, S2, is 0.
Tip: Operand Division Format
S1 is divided by S2. (S1 ÷ S2)
Ladder Diagram Examples
EDIV

The EDIV instruction divides a REAL dividend value, S1, by a REAL divisor value, S2, and saves the result in an assigned REAL data register, D. The quotient is saved in the data register, D, and the remainder is saved in the data register, D+1.

When the contact, M0.0, is powered ON, the REAL data register, D1, is divided by the REAL data register, D3, and the result is saved in the REAL data register, D5. The quotient is saved in the data register, D5, and the remainder is saved in the data register, D6.

Memory Monitor

EDIVP

The EDIVP instruction divides a REAL dividend value, S1, by a REAL divisor value, S2, and saves the result in an assigned REAL data register, D. The quotient is saved in the data register, D, and the remainder is saved in the data register, D+1. Every time this instruction executes, it energizes the output only once.

When the contact, M0.0, is powered ON, the REAL data register, D1, is divided by the REAL data register, D3, and the result is saved in the REAL data register, D5. The quotient is saved in the data register, D5, and the remainder is saved in the data register, D6.

Memory Monitor

