Instruction Parameters
Supported PLC Series
| PLC-AES | PLC-FB | PLC-ES |
|---|---|---|
| ✓ | ✓ | ✓ |
Supported Data Registers
| M | X | Y | K | L | F | T | C | S | Z | R | Q | D | @D | Constant | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| S | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | – | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
| D | ✓ | – | ✓ | ✓ | ✓ | – | ✓ | ✓ | – | ✓ | ✓ | ✓ | ✓ | ✓ | – |
Supported Flags
| Flag | Bit | Support |
|---|---|---|
| Error | F11.0 | ✓ |
| Zero | F11.1 | – |
| Carry | F11.2 | – |
Number of Steps
| Steps |
|---|
| 3 |
Operands
| Operand | Description |
|---|---|
| S | The first operand. Entries are WORD data registers or constants. This is the data register to count set bits. The signed value range is -32,768 ~ 32,767 (216). The unsigned value range is 0 ~ 65,535 (216-1). The Hexadecimal value range is H0000 ~ HFFFF. |
| D | The second operand. Entries are only WORD data registers. This represents the number of set bits found. The value will range from 0 ~ 16. |
Notice
Error Flag (F11.0) Notice
The error flag, F11.0, will be ON for one scan when the address of the data register assigned by @D exceeds the range of the data register, D. The range of the data register, D, is dependent on the CPU type.
Ladder Diagram Examples
SUM
The SUM instruction counts the set bits, the bits equal to 1, of the WORD value, S, and saves the amount of set bits in an assigned WORD data register, D.
When the contact, M2.0 is ON (1), the instruction counts the set bits, all bits equal to 1, of the WORD data register, D0. The result of the sum is saved in D2.
Memory Monitor
SUMP
The SUMP one-shot instruction counts the set bits, the bits equal to 1, of the WORD value, S, and saves the amount of set bits in an assigned WORD data register, D. Every time this instruction executes, it energizes the output only once.
When the contact, M2.1 is ON (1), the instruction counts the set bits, all bits equal to 1, of the WORD data register, D5. The result of the sum is saved in D7.
Memory Monitor
