Specifications

AES CPU Series General Specifications

Specification	Description
Operating Temperature	-10°C ~ 65°C 14°F ~ 149°F
Storage Temperature	-25°C ~ 80°C -13°F ~ 176°F

Specification	Description
Operating Humidity	5% ~ 95% RH, Non-condensing
Storage Humidity	5% ~ 95% RH, Non-condensing

Standards used: IEC 61131-2.

Frequency	Acceleration	Amplitude	Times
5Hz ≤ f < 9Hz	–	3.5mm	10 times in X, Y, and Z
9Hz ≤ f ≤ 150Hz	9.8^m/_s² (1G)	–	10 times in X, Y, and Z

Frequency	Acceleration	Amplitude	Times
5Hz ≤ f < 9Hz	–	1.75mm	10 times in X, Y, and Z
9Hz ≤ f ≤ 150Hz	4.9^m/_s² (0.5G)	–	10 times in X, Y, and Z

Description	Standard
• Maximum Shock Acceleration: 147^m/_s² (15G) • Time: 11ms • Pulse Wave: Sine Half-Wave (3 times in X, Y, Z)	IEC 61131-2

±2kV

Voltage: 4kV (contact) 8kV (air)

IEC 61131-2
IEC 61000-4-2

80MHz ~ 1,000MHz
10^V/_m

IEC 61131-2
IEC61000-4-3

No corrosive gas
No dust

2,000m or less

Pollution Degree 2 or less

Natural air cooling

Specifications	PLC-AES1616P, PLC-AES0808P, PLC-AES0808R
Program Control Method	Cyclic execution Time driven interrupt Stored Program
Input/Output Control	I/O Refresh Directed by program instruction
Program Languages	Instruction List (IL) Ladder Diagram (LD) Sequential Function Chart (SFC) Function Block Diagram (FBD) FBD Extension Structured Text (ST)
Data Processing Method	32-bit (4 Bytes)
Instructions (Sequence)	60
Instructions (Application)	480
Processing Speed (LD)	83^ns/_step
Processing Speed (MOV)	71^ns/_step
Processing Speed (Floating-point Arithmetic)	67^ns/_step
Floating-point Arithmetic	Support for floating-point arithmetic
Number of Program Blocks	128 Blocks Maximum
Operation Mode	Remote RUN Remote STOP
Data Preservation Against Power Failure	K data register Conservation (latch) in M, L, T, C, S, and D data registers Data registers that use Retain in Global Variable

Supporting Program	Description
LD	Scan Subroutine Initialize (COLD) Initialize (HOT) Periodic Interrupt
Special Configuration	Initializing Expansion Module PID Control I/O input module filter setting
Communication	User protocol (Serial) Modbus Master (RTU & TCP) Modbus Slave (RTU & TCP) High-speed Ethernet Link OPC UA Server
SFC	SFC Program
FBD	FBD FBD Extension
ST	ST Program Global Variable

Item	Description
Periodic Interruption	15 Maximum Cycle setting (10ms ~ 60,000ms, Unit: 10ms) Priority setting (0~14)
Maximum Expansion Modules	14 expansion modules + CPU 15 module chassis total
Self-Diagnosis	Monitoring process delay Watch Dog Timer (Detects delay of scan time) Memory error I/O error Low battery power ON/OFF status
Watch Dog Timer (WDT)	10ms ~ 5,000ms Unit: 10ms
Restarting	Cold Restart Hot Restart
Timer	Cycle: 0.01s ~ 6,553.5s (10ms or 100ms) On delay Addition Monostable Retriggerable TC (current value) TS (setting value)
Counter	Counter range: -32,768 ~ 32,767 Up counter Down counter Up or Down counter Ring counter CC (current value) CS (setting value)
Event Log	100 log maximum (Power, Mode, Error)
PID	64 channels (loops) Auto-tuning support
Features	I/O Reservation RTC Online-Edit Optional: SD/MMC Slot
Capacity of Scan Program	128,000 Steps
Memory Card (Spec)	SD Memory Card: FAT32, 32GB
Memory Card (Function)	Firmware upgrade Firmware downgrade Program download Data register memory backup

All PLC-AES series CPUs are allocated the first two WORDs of X (X0.0 ~ X1.F) and first two WORDs of Y (Y0.0 ~ Y1.F).

Physical Y outputs are accessed using Y1.0 ~ Y1.F.

Y0.0 ~ Y0.F are used internally and will NOT result in physical output.

When a PLC-AES1616P, the CPU utilizes both X (input) and Y (output).
Both allocations begin at WORD 0 (X0.0 and Y0.0).
As shown on the No Card line, the next expansion module begins at 20, meaning X2.0 and Y2.0.
- As a result, the CPU utilizes X0.0 ~ X1.F and Y0.0 ~ Y1.F.