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SFR & SFRP

Instruction Parameters

Supported PLC Series

PLC-AESPLC-FBPLC-ES
✓✓✓

Supported Data Registers

MXYKLFTCSZRQD@DConstant
D✓–✓✓✓–✓✓–✓✓✓✓✓–
n✓✓✓✓✓✓✓✓–✓✓✓✓✓✓

Supported Flags

FlagBitSupport
ErrorF11.0✓
ZeroF11.1–
CarryF11.2✓

Number of Steps

Steps
3

Operands

OperandDescription
DThe first operand.
Entries are only WORD data registers.
This is the value to shift to the right.
The result of the shift will be saved here.

The signed value range is -32,768 ~ 32,767 (216).
The unsigned value range is 0 ~ 65,535 (216-1).
The Hexadecimal value range is H0000 ~ HFFFF.
nThe second operand.
Entries are WORD data registers or constants.
This is the number of bits to shift.

The value range is 0 ~ 15.
The remainder n ÷ 16 will be the result of n if the value of n is greater than 15.

Notice

Error Flag (F11.0) Notice

The error flag, F11.0, will be ON for one scan when the address of the data register assigned by @D exceeds the range of the data register, D. The range of the data register, D, is dependent on the CPU type. F11.0 turns ON when the value of the data for a shift exceeds the data register assigned to D.

Carry Flag (F11.2) Notice

The carry flag, F11.2, will be ON for one scan when the operation result overflows.

Instruction Behavior

The SFR and SFRP instructions behave as follows:

  • The value in the data register, D, is shifted to the right.
    • The value is shifted in the direction of the least significant bit.
  • The carry flag turns ON when 1 is shifted into the carry flag, F11.2.
  • n should be a value from 0 ~ 15.
    • If n is greater than 15, the remainder from n ÷ 16 is the equivalent.
      • Example: if n = 18, the remainder is 2.
        • This is the same as n = 2.
  • Starting from the most significant bit, n bits are equal to 0.
    • This occurs when the instruction is energized.
  • Data from bit 0 ~ n-2 are lost after the instruction executes.

T and C Registers

With the T and C data registers, only the value of TC and CC can be shifted.

Execution Condition

It is recommended that the SFR instructions be used with a pulse contact as an execution condition, or use the SFRP instruction.

Ladder Diagram Examples

SFR

The SFR instruction will shift the WORD value, D, n number of bits to the right. The result of the rotation is saved in the same assigned WORD data re

The SFR instruction will shift the WORD value, D, n number of bits to the right. The result of the rotation is saved in the same assigned WORD data register, D. The carry flag, F11.2, can be used.

The initial value of the WORD data register, D0, is 4,496.

The initial value of the WORD data register, D0, is 4,496.

When the contact, M0.0, is powered ON (1), the instruction shifts the WORD data register, D0, 4 bits to the right.

When the contact, M0.0, is powered ON (1), the instruction shifts the WORD data register, D0, 4 bits to the right.

The value of the WORD data register, D0, changes from 4,496 to 281.

The value of the WORD data register, D0, changes from 4,496 to 281.

No bits shift past bit 0. So, no bits are discarded.

No bits shift past bit 0. So, no bits are discarded.

When the instruction is reenergized, the WORD data register, D0, is shifted 4 bits to the right again.

When the instruction is reenergized, the WORD data register, D0, is shifted 4 bits to the right again.

The value of the WORD data register, D0, changes from 281 to 17.

The value of the WORD data register, D0, changes from 281 to 17.

The bit shifted past bit 0 is discarded.

The bit shifted past bit 0 is discarded.

The last bit is shifted into the carry flag bit, F11.2.

The last bit is shifted into the carry flag bit, F11.2.

SFRP

The SFRP one-shot instruction will shift the WORD value, D, n number of bits to the right. The result of the rotation is saved in the same assigned WO

The SFRP one-shot instruction will shift the WORD value, D, n number of bits to the right. The result of the rotation is saved in the same assigned WORD data register, D The carry flag, F11.2, can be used. Every time this instruction executes, it energizes the output only once.

The initial value of the WORD data register, D2, is -15,928.

The initial value of the WORD data register, D2, is -15,928.

When the contact, M0.1, is powered ON (1), the instruction shifts the WORD data register, D2, 5 bits to the right.

When the contact, M0.1, is powered ON (1), the instruction shifts the WORD data register, D2, 5 bits to the right.

The value of the WORD data register, D2, changes from -15,928 to 1,550.

The value of the WORD data register, D2, changes from -15,928 to 1,550.

The bit shifted past bit 0 is discarded.

The bit shifted past bit 0 is discarded.

When the instruction is reenergized, the WORD data register, D2, is shifted 5 bits to the right again.

When the instruction is reenergized, the WORD data register, D2, is shifted 5 bits to the right again.

The value of the WORD data register, D2, changes from 1,550 to 48.

The value of the WORD data register, D2, changes from 1,550 to 48.

The bits shifted past bit 0 are discarded.

The bits shifted past bit 0 are discarded.

When the instruction is reenergized, the WORD data register, D2, is shifted 5 bits to the right again.

When the instruction is reenergized, the WORD data register, D2, is shifted 5 bits to the right again.

The value of the WORD data register, D2, changes from 48 to 1.

The value of the WORD data register, D2, changes from 48 to 1.

The last bit is shifted into the carry flag bit, F11.2.

The last bit is shifted into the carry flag bit, F11.2.

Ladder Diagram Example for MapleLogic SFR/SFRP instruction.